Remote Evaluation System for IP Cores
Please find below instructions on how to use our free-of-charge remote evaluation system.
This remote evaluation system lets you connect to MLE’s IP core evaluation lab via a remote connection so you can evaluate and try out certain IP cores from MLE and partners. Foundation of this is the Apache Guacamole project which provides a secure, clientless remote desktop gateway using your HTML5 enabled web browser. We have tested this using Chrome 80 or newer, and Firefox 75 or newer.
To get access to MLE’s Remote Evaluation System, please contact MLE. After a brief discussion which evaluation will work best for you, our team will provide you with a link and unique login credentials. This allows you to:
- Evaluate and try the IP core when it is running live on an FPGA system under your control – which saves you from engineering time to integrate and compile the IP core on target hardware
- Have your own copy of a virtual environment – which allows you to run your tests, keep your logs, for example, if your calendar forces you to interrupt your current evaluation
In response to your evaluation request we will set up a virtual machine for you and just for you, Your VM. Your VM runs a remote desktop under Linux (“exported” via Apache Guacamole) and has all relevant connections configured for you to access and interact with FPGA hardware running the IP core you wish to try. Typically you will be running from a Linux Command-Line Interface, but cut&paste shall work, making things quick and easy to reproduce. Your VM will also provide links to online documentation.
Once you have been granted remote access you typically have 30 days to run your evaluation. If during that time you need exclusive access to the underlying (FPGA) hardware, please contact us to request specific timeslots. We will then block access exclusivly for you and during those timeslots noone else gets (FPGA) hardware access.
After your 30 day evaluation period we will delete Your VM. So please copy your notes and evaluation results over to your own systems. Or, please contact us prior to extend your evaluation. And, if you then want to try the IP core in your FPGA design and on your FPGA hardware, please contact us to receive an FPGA reference design project.