FPGA Analog Output

December 14, 2009Application Notes, I/O Connectivity

Analog Output With Delta-Sigma DAC

TB20091214

This document describes an approach for realizing analog output using so-called Delta-Sigma Converters in the MLE 1000 Series Rapid Prototyping System. After introducing the concept of Delta-Sigma-Converters as hardware programmable Digital to Analog Converters (DAC) we give an overview over a possible system implementation.

Analysis results show that Delta-Sigma Converters can even be used for high-quality analog audio output in a very resource efficient way. This is not only applicable to the MLE 1000 Series Rapid Prototyping System but obviously applies to other FPGA-based implementations, too.

FPGA + Intel Atom

December 3, 2009Application Notes, I/O Connectivity

Connecting FPGA Companion Chips to Intel ATOM CPUs

TB20091203

This Technical Brief introduces the options for connecting Field-Programmable Gate-Array (FPGA) devices via Peripheral Component Interconnect Express (PCIe) to microprocessors such as the Intel ATOM microprocessor. Using FPGAs as companion chips adds flexibility to implement special-purpose I/O and efficient means for parallel and digital signal processing.

On the hardware side, we will describe the design options when using Altera Arria GX or Xilinx Virtex-5 devices. On the software side, we compare the performance of polling interfacing with Direct Memory Access (DMA) running under Linux.

LVDS Camera

November 27, 2009Application Notes, I/O Connectivity

LVDS Connectivity for the MLE 1000 Series

TB20091127

This Technical Brief describes how to connect to certain modern cameras that provide a serialized protocol over a Low Voltage Differential Signaling (LVDS) interface. Utilizing the flexibility of today’s Field Programmable Gate-Array (FPGA) devices, the requirements for the I/Os are discussed first. Then an implementation is shown which implements a Data and Clock Recovery mechanism and a Synchronization and Packetization module in FPGA logic. The implementation has been tested and can serve serialized LVDS camera interfaces of 300 Mbps and higher.

While the approach has been implemented for and been tested on a Missing Link Electronics 1000 Series Rapid Prototyping System, it can easily be adapted to other FPGA-based electronic designs. It can also be extended to drive LVDS-based TFT displays.