Software Development¶
This section deals with sofware development on the PS of the Zynq UltraScale+ MPSoC. A Software Reference Project with bare-metal examples and complete Linux system is provided, and described below.
The following sections expect you to have obtained the Software Reference Project and entered a development environment by having followed these steps:
- Download the Software Reference Project from MLE. Please contact MLE for download instructions.
- Extract the tarball on your disk and enter the extracted folder.
- Enter a Vivado 2016.4 environment by e.g. sourcing the corresponding
settings.shfile. - Enter a PetaLinux 2016.4 environment by e.g. sourcing the corresponding
settings.shfile.
Bare-Metal¶
DRAM Diagnostics Test¶
The Zynq MP DRAM diagnostics test is a stand-alone program running on a single Zynq UltraScale+ MPSoC Cortex-A53 processor, executing out of OCM. To perform a full memory test, follow these steps:
Set the boot mode to JTAG according to section Boot Mode.
Power up the board by booting the host PC.
Start a Vivado hardware server on the development machine connected to the board via JTAG.
Point the environment variable
HW_SERVER_URLto your hardware server address:$ export HW_SERVER_URL=tcp:<host>:<port>
Run:
$ make $ make dram-test
to build the FSBL of the PetaLinux project and the DRAM test executable.
Run:
$ make boot-dram-test
to boot the DRAM test executable via JTAG.
You should see the following output in your terminal:
Xilinx Zynq MP First Stage Boot Loader Release 2016.4 Jun 26 2017 - 16:29:19 ******************************************************************************** Zynq MPSoC DRAM Diagnostics Test (A53) ******************************************************************************** Select one of the options below: +--------------------------------------------------------------------+ | Memory Tests | +-----+--------------------------------------------------------------+ | '0' | Test first 2MB region of DDR | | '1' | Test first 32MB region of DDR | | '2' | Test first 64MB region of DDR | | '3' | Test first 128MB region of DDR | | '4' | Test first 256MB region of DDR | | '5' | Test first 512MB region of DDR | | '6' | Test first 1GB region of DDR | | '7' | Test first 2GB region of DDR | | '8' | Test first 4GB region of DDR | | '9' | Test first 8GB region of DDR | +-----+--------------------------------------------------------------+ | Eye Tests | +-----+--------------------------------------------------------------+ | 'r' | Perform a read eye analysis test | | 'w' | Perform a write eye analysis test | | 'a' | Print test start address | | 't' | Specify test start address (default=0x0) | | 's' | Select the DRAM rank (default=1) | +-----+--------------------------------------------------------------+ | Miscellaneous options | +-----+--------------------------------------------------------------+ | 'i' | Print DDR information | | 'v' | Verbose Mode ON/OFF | | 'o' | Toggle cache enable/disable | | 'b' | Toggle between 32/64-bit bus widths | | 'h' | Print this help menu | +-----+--------------------------------------------------------------+ Bus Width = 64, D-cache is enable, Verbose Mode is OFF Enter 'h' to print help menu Enter Test Option:Press
9to perform a memory test on the full 8 GB of the first rank. You should see something like this:Starting Memory Test '9' - Testing 8GB length from address 0x0... ---------+--------+------------------------------------------------+----------- TEST | ERROR | PER-BYTE-LANE ERROR COUNT | TIME | COUNT | LANES [ #0, #1, #2, #3, #4, #5, #6, #7] | (sec) ---------+--------+------------------------------------------------+----------- MT0(1: 0)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 174.058 ---------+--------+------------------------------------------------+----------- MTS(1: 1)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0002 ---------+--------+------------------------------------------------+----------- MTS(1: 2)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0559 ---------+--------+------------------------------------------------+----------- MTS(1: 3)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0553 ---------+--------+------------------------------------------------+----------- MTS(1: 4)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0559 ---------+--------+------------------------------------------------+----------- MTS(1: 5)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0546 ---------+--------+------------------------------------------------+----------- MTS(1: 6)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0559 ---------+--------+------------------------------------------------+----------- MTS(1: 7)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0559 ---------+--------+------------------------------------------------+----------- MTS(1: 8)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 89.0559 ---------+--------+------------------------------------------------+----------- MTP(1: 9)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 140.875 ---------+--------+------------------------------------------------+----------- MTP(1:10)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 140.868 ---------+--------+------------------------------------------------+----------- MTL(1:11)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 155.228 ---------+--------+------------------------------------------------+----------- MTL(1:12)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 155.228 ---------+--------+------------------------------------------------+----------- MTL(1:13)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 155.228 ---------+--------+------------------------------------------------+----------- MTL(1:14)| 0 | 0, 0, 0, 0, 0, 0, 0, 0 | 155.228 ---------+--------+------------------------------------------------+----------- Bus Width = 64, D-cache is enable, Verbose Mode is OFFPress
sand then2to select the second memory rank. Then press9again to repeat the memory test for the second rank.
PetaLinux¶
A PetaLinux project customized to the peripherals of the Sidewinder-100 is provided as a part of the Software Reference Project. The following sections focus on the specifics of the Sidewinder-100; please see the PetaLinux Reference Guide (UG1144) for further information.
Build Process¶
In order to build the PetaLinux project by yourself, please execute:
$ make
to start building the project.
Note
Building the PetaLinux project for the first time can take a considerable amount of time to complete.
Note
A warning like:
webtalk failed:PetaLinux statistics:extra lines detected:notsent_nofile!
webtalk failed:Failed to get PetaLinux usage statistics!
at the end of the build process originates from Xilinx’s customer participation tool WebTalk and can be safely ignored.
Board Support Package¶
A Board Support Package (BSP) is provided for download as a basis for your own PetaLinux projects. Please contact MLE for download instructions. You can then create a new PetaLinux project based on the BSP by executing:
$ petalinux-create -t project -n <project-name> -s /path/to/fidus-sw100-v2016.4-final1.bsp
You can also create the BSP by yourself from the Software Reference project by executing the following command:
$ make package-bsp
Boot Mode¶
The Sidewinder-100 board can be booted from SD card, QSPI and JTAG. See section Boot Mode on how to correctly set the boot mode before following the steps of the corresponding subsections.
SD Card¶
Format your SD card with a single FAT32 file system. Execute:
$ make package-boot
and copy the files BOOT.BIN and image.ub from the
images/linux directory onto your SD card.
Hint
If U-Boot fails to boot the Linux kernel, the QSPI flash might hold ill-suited environment settings from a previous installation. From the U-Boot prompt, execute:
ZynqMP> env default -a
ZynqMP> env save
and then proceed with booting the Linux kernel:
ZynqMP> boot
JTAG¶
JTAG boot mode assumes a development workflow where all build artifacts – bitstream, FSBL, U-Boot, kernel image and root filesystem – are provided remotely by a development server using JTAG, TFTP and NFS.
Setup a Xilinx Hardware Server, TFTP and NFS server on your development host.
Point the environment variable
HW_SERVER_URLto the Vivado hardware server address:$ export HW_SERVER_URL=tcp:<host>:<port>
Execute:
$ make boot-linux
When booting for the first time from JTAG, hit any key to stop autoboot when U-Boot is loading and change the following environment variables in the U-Boot shell:
ZynqMP> env set serverip <boardsrv_ip> ZynqMP> env set kernel_img <kernel_img_path> ZynqMP> env set bootargs "console=ttyPS0,115200 root=/dev/nfs ip=dhcp rw" ZynqMP> env set default_bootcmd "run netboot" ZynqMP> env set netboot 'tftpboot ${netstart} ${kernel_img} && bootm ${netstart}#conf@2'Then save the environment in the QSPI flash using:
ZynqMP> env save
and proceed with booting the Linux kernel without initramfs using:
ZynqMP> boot
QSPI¶
PCIe Host, Secondary M.2 and QSFP Power¶
The PCIe host root port, secondary M.2 and the QSFP are not powered without PS
interaction. In order to simplify experimentation, these devices are powered
up by default during Linux boot. Two always-on fixed-regulator device tree
nodes have been added for that purpose, with number 0 powering the QSFP and
M.2 pin, while number 1 powers the PCIe host.
One can observe the state of both regulators using sysfs:
$ cat /sys/class/regulator/regulator.1/name
qsfp-m2
$ cat /sys/class/regulator/regulator.1/state
enabled
$ cat /sys/class/regulator/regulator.2/name
pcie-host
$ cat /sys/class/regulator/regulator.2/state
enabled
Main Memory¶
Serial Presence Detect¶
Serial Presence Detect (SPD) is a standardized way to automatically access
information about a memory module. Two eeprom nodes have been added to the
device tree for accessing the EEPROM of the PS and PL DDR4 main memory. As the
decode-dimms script currently does not support DDR4, one needs to dump the
EEPROM content using sysfs and use an external tool for interpreting the
content:
$ hexdump -C /sys/bus/i2c/drivers/at24/1-0050/eeprom # PS DDR
00000000 23 11 0c 09 85 21 00 08 00 60 00 03 09 0b 80 00 |#....!...`......|
00000010 00 00 07 0d f8 7f 00 00 6e 6e 6e 11 00 6e f0 0a |........nnn..n..|
00000020 20 08 00 05 00 a8 1b 28 28 00 78 00 14 3c 00 00 | ......((.x..<..|
00000030 00 00 00 00 00 00 00 00 00 00 00 00 2b 16 2c 0b |............+.,.|
00000040 2c 16 2c 0c 0c 2c 2c 0c 15 36 2b 15 0b 36 00 00 |,.,..,,..6+..6..|
00000050 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
00000070 00 00 00 00 00 00 9c b5 00 00 00 00 e7 d6 b3 e8 |................|
00000080 0f 11 07 01 00 00 00 00 00 00 00 00 00 00 00 00 |................|
00000090 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 |................|
*
000000f0 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ae 2c |...............,|
00000100
$ hexdump -C /sys/bus/i2c/drivers/at24/1-0051/eeprom # PL DDR
...
Device tree nodes for the DIMM on-chip temperature sensors have been added as well, but these will only be supported in later versions of PetaLinux shipping a more recent release of the Linux kernel.
Error-correcting Code (ECC) Memory¶
The Sidewinder-100 has the option of using ECC Memory. The following describes how to test ECC under Linux:
Execute the following command if you want to enable correctable error injection:
$ echo "CE" > /sys/devices/system/edac/mc/mc0/inject_data_poison
Or, execute the following command if you want to enable uncorrectable error injection:
$ echo "UE" > /sys/devices/system/edac/mc/mc0/inject_data_poison
Specify an address to inject ECC errors by configuring the data poison registers:
$ echo 0x7EE0EEE0 > /sys/devices/system/edac/mc/mc0/inject_data_error
Corrupt the data at the specified address:
$ devmem 0x7EE0EEE0 32 0x1234
Reading the corrupted data at the same address using devmem will trigger an error interrupt:
$ devmem 0x7EE0EEE0
Whenever the read occurs the error condition is triggered and the EDAC driver will print the following message if the CE bit was set in the data poisen register:
[16610.380274] EDAC MC0: 1 CE DDR ECC error type :CE Row 16240 Bank 1 Col 0 BankGroup Number 3 Block Number 476 on mc#0csrow#0channel#0 (csrow:) 0x00001234
Or, if you enabled uncorrectable error injection:
[16666.860334] Unhandled fault: synchronous external abort (0x92000210) at 0x0000007fa29f3ee0 [16666.860345] EDAC MC0: 1 UE DDR ECC error type :UE Row 16240 Bank 1 Col 0 BankGroup Number 3 Block Number 476 on mc#0csrow#0channel#0 (csrow:) Bus error
Benchmark¶
Fig. 18 Memory Bandwidth vs. Segment Size.
Fig. 19 Memory Latency vs. Array Size.
Memory bandwidth and lateny benchmarks have been conducted for the PS-attached DDR4 memory using LMbench. Fig. 18 shows the results fo the bandwidth vs. segment size benchmark, while Fig. 19 presents the latency vs. array size results.
UART¶
UART 0 and 1 are connected via a USB to UART Bridge, with UART 0 being used
as the serial console. They show up as /dev/ttyPS0 and /dev/ttyPS1
under Linux.
SD Card¶
SD 1 shows up as /dev/mmcblk0 under Linux.
QSPI¶
The QSPI flash shows up as MTD devices under Linux. The standard PetaLinux partition layout can be observed by executing:
$ cat /proc/mtd
dev: size erasesize name
mtd0: 00100000 00002000 "boot"
mtd1: 00040000 00002000 "bootenv"
mtd2: 01600000 00002000 "kernel"
Management Ethernet¶
For accessing the PS remotely, the Sidewinder-100 features a management ethernet port
using GEM 3. By default MAC address 00:0a:35:00:22:10 is used. It shows up
as eth0 under Linux, e.g.:
$ ip addr show eth0
2: eth0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc mq state UP group default qlen 1000
link/ether 00:0a:35:00:22:10 brd ff:ff:ff:ff:ff:ff
inet 10.89.231.254/24 brd 10.89.231.255 scope global eth0
valid_lft forever preferred_lft forever
inet6 fe80::20a:35ff:fe00:2210/64 scope link
valid_lft forever preferred_lft forever
Clock Chips¶
The Sidewinder-100 hosts various clock chips for PCIe, NVMe, QSFP, PL DDR and the reference clocks. As these clock chips are already mask-programmed for their respective frequencies and have no Linux drivers, there is currently no planned Linux support.
Long-term Stability Test¶
A long-term stability test can be performed using the bundled LMbench tool. Execute:
$ lmbench-run
and answer all questions asked by the tool.
Note
A full run of LMbench with all benchmarks activated takes several hours.
