High-Speed Data Acquisition Systems
High-Speed Data Acquisition Systems
Challenges and design choices to network FPGAs and servers for high-speed data acquisition or retrieval. We discuss TCP/IP as a very fast transport when using TCP/IP full accelerators, in the sensor-side FPGA and in the server.
- High-Speed Data Acquisition Systems
- 1 Challenges in High Speed Data Acquisition
- 2 Design Choices for High Speed Data Acquisition
- 2.1 TCP/IP Full Acceleration for High Speed Data Acquisition
- 2.2 Optimize the Server’s Network Subsystem
- 2.3 Use Offload Engines, Kernel Bypass, or RDMA for High Speed Data Acquisition
- 2.4 Use an FPGA NIC with TCP/IP Full Acceleration for High Speed Data Acquisition
- 2.5 Use PCIe Peer-to-Peer for High Speed Data Acquisition
Recording with NVMe SSDs
Sustained, High-Speed Data Recording with NVMe SSDs
MLE has been providing NVMe Streamer, an FPGA-based technology which enables users to directly stream onto NVM Express (NVMe) SSDs data to and from Programmable Logic (PL). The objective behind NVMe Streamer was to provide a solution for high speed data recording (and re-play) without any CPUs involved, either because your FPGA does not have an embedded CPU or because you are looking for a solution with deterministically high read/write bandwidth and performance scalability.