FPGA DevTips

Here we collect the difficulties we discovered during the FPGA development process and share our methodologies and techniques to solve them.

Network Acceleration

Increase Speed and Save Resources with Simple Coding Style Changes

Increase Speed and Save Resources with Simple Coding Style Changes

May 12, 20234 min read

FPGA Programming – Increase Speed and Save Resources with Simple Coding Style Changes Table of ContentsFPGA Programming – Increase Speed…


Storage Acceleration

A Deep Dive into AMD/Xilinx AXI Bridge for PCI Express (AMD/Xilinx PG194) and Why We Tweaked C_M_AXI_NUM_READQ

A Deep Dive into AMD/Xilinx AXI Bridge for PCI Express (AMD/Xilinx PG194) and Why We Tweaked C_M_AXI_NUM_READQ

Jun 8, 20227 min read

A Deep Dive into AMD/Xilinx AXI Bridge for PCI Express (AMD/Xilinx PG194) and Why We Tweaked C_M_AXI_NUM_READQ Table of ContentsA…

Picking The Right Granularity When Buffering PCIe/NVMe Data

Picking The Right Granularity When Buffering PCIe/NVMe Data

Dec 15, 20214 min read

Picking The Right Granularity When Buffering PCIe/NVMe Data Table of ContentsPicking The Right Granularity When Buffering PCIe/NVMe DataBlockRAM (BRAM)UltraRAM (URAM)DDRx…


Lab Setups

Mini, Midi, Big or Supersize – Motherboard Demo Solution for Proof of Concept (POC)

Mini, Midi, Big or Supersize – Motherboard Demo Solution for Proof of Concept (POC)

Sep 7, 20232 min read

Mini, Midi, Big or Supersize – Motherboard Demo Solution for Proof of Concept (POC) Our Mission: If It Is Packets,…

Molex Mini-Fit Jr – Know your Power, and Don’t Get Confused – “PCIe” and “Xilinx Not PCIe” Power Connector

Molex Mini-Fit Jr – Know your Power, and Don’t Get Confused – “PCIe” and “Xilinx Not PCIe” Power Connector

Nov 23, 20223 min read

Molex Mini-Fit Jr – Know your Power, and Don’t Get Confused – “PCIe” and “Xilinx Not PCIe” Power Connector Table…

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