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    A TCP/IP Stack for High-Performance Chip-to-Chip

    A TCP/IP Stack for High-Performance Chip-to-Chip

    Stream processing enables parallel data handling by creating pipelines of Stream Processing Elements (SPE) between a data source (typically a sensor) and a data sink (typically a decision maker), synchronized through back pressure. For multiple FPGA systems, the so-called AURORA protocol is frequently used in industrial, medical and scientific applications. However, TCP/IP over multi-Gigabit Ethernet can offer a more reliable and resource-efficient solution for distributed systems, in particular when FPGA devices are farther apart.

    This Technical Brief shares our experiment data, comparing the reliability and resource efficiency of Aurora protocol and TCP/IP, an MLE NPAP Full Accelerator running TCP/IP inside the programmable logic.

    Analyzing Network Impairment and Signal Integrity in High-Speed TCP/UDP/IP Ethernet Networks

    Analyzing Network Impairment and Signal Integrity
    in High-Speed TCP/UDP/IP Ethernet Networks

    Summary

    MLE has been supporting customers in implementing distributed systems. MLE NPAP, the TCP/UDP/IP Stack originating from Fraunhofer HHI, has been one of the underlying technologies to connect FPGAs with each other as well as with servers and sensors reliably. 

    Customer implementations range from systems using a purpose-built LAN, or systems exposed to high levels of electro-magnetic inference (EMI), or rotating nodes using slip rings, or wireless. 

    Engineering teams often focus on delivering high throughput (close to linerate) and very low latency (i.e. a small Bandwidth-Delay-Product). Network impairment can quickly derail those engineering efforts. Therefore, MLE NPAP has built-in means to diagnose the effects of real-life network impairment. 

    This Technical Brief expands on analyzing network impairments and explains how these can be emulated when using Field-Programmable Gate Arrays (FPGAs), leading to technical insights allowing you to deliver better systems, faster.

    High-Speed Camera Recorder Powered by MLE’s Fast FPGA RAID (FFRAID)

    High-Speed Camera Recorder Powered by MLE’s Fast FPGA RAID (FFRAID)

    Excelitas PCO is a pioneer in cameras and optoelectronics, offering distinct platforms for high-speed cameras for a wide range of industrial, scientific, car safety, and aerospace applications.

    The new pco.dimax series offers a unique platform of high-speed streaming cameras that enable clear images with a recording speed of over 2000 fps at a full resolution of 3.6 MPixel. This massive raw data rate comes with the challenges to record this image data gapless and lossless!

    MLE helped Excelitas PCO develop the high-speed data acquisition and recording systems by implementing FFRAID — a Fast FPGA RAID — to offload CPU-intensive tasks and achieve up to 200 Gbps sustained recording speeds.

    FPGA-Based Systems With MicroTCA

    FPGA-Based Systems With MicroTCA

    Many FPGA-based systems projects are rather low volume and, therefore, favor off-the-shelf hardware over the costs and risks of custom hardware (PCB) design.
    MicroTCA or mTCA or µTCA is a 20+ year old standard from PICMG for implementing embedded systems using off-the-shelf hardware. Most often MicroTCA is used for test & measurement or for scientific applications when application specific IOs and signals need to be processed where FPGAs provide the flexibility and processing performance.
    However, as we will demonstrate in this Technical Brief, MicroTCA carries a huge baggage, and has little to no advantages over other approaches, namely FPGA based System-on-Modules or the “good old” PC architecture.

    Shift-Left Your FPGA Design Projects

    Shift-Left Your FPGA Design Projects

    Summary

    FPGA Full System Stacks comprising off-the-shelf FPGA System-on-Modules (SoM) plus pre-validated FPGA IP Cores and subsystems can greatly accelerate the time-to-market of your FPGA design project. Advantages of FPGA Full System Stacks include:

    1. FPGA developers can rely on a tested and verified subsystem implementation. The concept of re-use increases design productivity while sharing the FPGA subsystem development costs and risks over many users.
    2. Pre-validated FPGA IP-Cores and subsystems make clever use of the different FPGA resources to realize a cost/performance optimized domain-specific architecture.
    3. Software is included in the form of kernel space device drivers, user-space programmer APIs, and sometimes even complete OS images, all nicely tuned for guaranteeing the overall system’s reliability and performance.

    FPGA Full System Stacks from MLE are integrated with select FPGA SoMs from Trenz Electronics and are focused on applications such as:

    • Realiable, Low-Latency, High-Throughput Network Transports
    • High-Speed Data Acquisition
    • Augmented Stereo Computer Vision
    • High-Speed Data Record & Replay

    We describe a design methodology using FPGA Full System Stacks and share our experiences from real customer designs.