Networking
- MLE’s Novel Approach for Microsecond-level Time Synchronization Between 5G V2X Sidelink User Equipments (UEs)
- Myth-Busting Latency Numbers for TCP Offload Engines
- High-Speed Data Acquisition Systems
- Put a TCP/UDP/IP Turbo Into Your FPGA-SmartNIC
- Latency Measurement of 10G/25G/50G/100G TCP-Cores using RTL Simulation
- Latency Analysis for NVMe/TSN
- Deterministic Networking with TSN-10/25/50/100G
Storage
- High-Speed Camera Recorder Powered by MLE’s Fast FPGA RAID (FFRAID)
- FFRAID – A Fast FPGA RAID
- MLE NVMe FPGA Full System Stack for AMD Versal AI Edge
- NVMe Streaming
- Recording with NVMe SSDs
- SATA Storage for Zynq
Security
Methodologies
- FPGA-Based Systems With MicroTCA
- Shift-Left Your FPGA Design Projects
- High Level Synthesis for Intel and Xilinx FPGAs
- PCIe Non-Transparent Bridging (PCIe NTB)
I/O Connectivity
- AMD/Xilinx Zynq UltraScale+ MPSoC PS Mali GPU to PL
- USB 2.0 Host Dev Guide
- Nios-II Multiboot
- FPGA + integrated DAC
- FPGA + integrated ADC
- Linux SysFS
- USB Hot-Plug for UMTS
- Network Connectivity
- Bluetooth Testing
- TFT Image Analysis
- FPGA Analog Output
- FPGA + Intel Atom
- LVDS Camera
Zynq SATA
Application Notes
Here MLE shares our latest research, development, and findings in FPGAs, Intellectual Property (IP) cores, and related applications. Please choose from the topics menu on the left or hit the search bar. Each application note is available in both HTML and PDF version.
Most application notes are public, while some of our lastest research or development are member-only. For full access to all our application notes and technical briefings, we kindly request that you register as MLE DevZone member with a valid work email.
If you have any questions please feel free to contact MLE.
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MLE’s Novel Approach for Microsecond-level Time Synchronization Between 5G V2X Sidelink User Equipments (UEs)
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FPGA-Based Systems With MicroTCA
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