CONTACT MLE
Please fill in the form and your requirements below, and our team will contact you soon.


    AMD (Xilinx)Altera (Intel)LatticeMicrochip (MicroSemi)Other

    *By submitting this form you are consenting to being contacted by the MLE via email and receiving marketing information.

    X
    CONTACT MLE

    Latency Measurement of 10G/25G/50G/100G TCP-Cores using RTL Simulation

    Distributed Systems-of-Systems which, for example, connect smart sensor hubs with centralized processing via Ethernet, require very low transport latencies in order to deliver short response times. This makes it difficult for system designers to evaluate. And, things get worse if the measurement setup and methodology is not clearly explained, neither can be reproduced. Therefore, in this Technical Brief we describe how we use the Questa Advanced Simulator from Siemens EDA to measure network latency and analyze latency in a network protocol processing system. And, we also provide the most recent latency values for NPAP, the TCP/IP Stack from Fraunhofer HHI which is, as it turns out, very competitive with other solutions. Being integrators ourselves, we believe we owe this to the FPGA ecosystem!


    To read the full content, please log in or register as an MLE Developer Zone Member.

    Existing Users Log In