4.5. Hybrid Acceleration by Combining NPAP With FPGA Network Interface Cards (NIC)

4.5. Hybrid Acceleration by Combining NPAP With FPGA Network Interface Cards (NIC)

Hybrid acceleration refers to the concept of combining MLE NPAP for full acceleration with an FPGA Network Interface Card (NIC). The NIC does some network packet handling in FPGA logic and then DMAs the data into a host CPU which then runs the Linux TCP/UDP/IPv4 stack. Because TCP does so-called fair bandwidth sharing *refer to RFC2914, RFC5166 and RFC8312) the motivation is to allow trade-offs between performance (as in throughput and latency) over FPGA resource usage for many TCP/IPv4 connections. For example, if you run many TCP connections over one single 100 GigE link, you may want full acceleration for, say, up to 20 TCP connections: When 3 TCP connections are open, then each one gets 33 Gbps bandwidth which clearly needs a full accelerator. But for moments, when 200 TCP connections are open, then each TCP connection gets 500 Mbps bandwidth, so you can run most of them un-accelerated, in software. Obviously, this needs an architectural decision where Team MLE can help!

At MLE we have been using (and contributing to) the Corundum project: http://corundum.io 

Corundum is an open-source, high-performance FPGA-based NIC and platform for In-Network Compute. Features include a high performance datapath, 10G/25G/100G Ethernet, PCIe connectivity to the host, a custom, high performance, tightly-integrated PCIe DMA engine, many (1000+) transmit, receive, completion, and event queues, scatter/gather DMA, MSI, multiple interfaces, multiple ports per interface, per-port transmit scheduling including high precision TDMA, flow hashing, RSS, checksum offloading, and native IEEE 1588 PTP timestamping. A Linux driver is included that integrates with the Linux networking stack. Development and debugging is facilitated by an extensive simulation framework that covers the entire system from a simulation model of the driver and PCI express interface on one side to the Ethernet interfaces on the other side (https://docs.corundum.io/en/latest/contents.html). 

One of the key advantages of the Corundum architecture is support for In-Network Processing inside the FPGA logic, shown as “App” in the block diagram: