Shift-Left Your FPGA Design Projects
Shift-Left Your FPGA Design Projects
Summary
FPGA Full System Stacks comprising off-the-shelf FPGA System-on-Modules (SoM) plus pre-validated FPGA IP Cores and subsystems can greatly accelerate the time-to-market of your FPGA design project. Advantages of FPGA Full System Stacks include:
- FPGA developers can rely on a tested and verified subsystem implementation. The concept of re-use increases design productivity while sharing the FPGA subsystem development costs and risks over many users.
- Pre-validated FPGA IP-Cores and subsystems make clever use of the different FPGA resources to realize a cost/performance optimized domain-specific architecture.
- Software is included in the form of kernel space device drivers, user-space programmer APIs, and sometimes even complete OS images, all nicely tuned for guaranteeing the overall system’s reliability and performance.
FPGA Full System Stacks from MLE are integrated with select FPGA SoMs from Trenz Electronics and are focused on applications such as:
- Realiable, Low-Latency, High-Throughput Network Transports
- High-Speed Data Acquisition
- Augmented Stereo Computer Vision
- High-Speed Data Record & Replay
We describe a design methodology using FPGA Full System Stacks and share our experiences from real customer designs.
- Shift-Left Your FPGA Design Projects
- Summary
- Shift-Left Your FPGA Design Projects
- 1. Benefits of FPGA System-on-Modules
- 2. Advantages of Pre-Validated FPGA Subsystems
- 2.1. NPAP – MLE’s Network Protocol Acceleration Platform
- 2.2. High-Speed Data Acquisition
- 2.3. Augmented Stereo Computer Vision
- 2.4. High-Speed Data Record & Replay
- 3. A Shift-Left Methodology for FPGA Design
- 3.1. First Step: Development Kits for Architecture Validation
- 3.2. Ship Products based on SoMs
- 3.3. Cost-Down for Volume Ramp-Up
- 4. Real-Life Examples of Shift-Left FPGA Design
- 4.1. From Devkit to SoM to First-Customer-Ship
- 4.2. From SoM to Chip-Down
- 4.3. From SoM to PCIe Card
- 5. Conclusion
High-Speed Data Acquisition Systems
High-Speed Data Acquisition Systems
Challenges and design choices to network FPGAs and servers for high-speed data acquisition or retrieval. We discuss TCP/IP as a very fast transport when using TCP/IP full accelerators, in the sensor-side FPGA and in the server.
- High-Speed Data Acquisition Systems
- 1 Challenges in High Speed Data Acquisition
- 2 Design Choices for High Speed Data Acquisition
- 2.1 TCP/IP Full Acceleration for High Speed Data Acquisition
- 2.2 Optimize the Server’s Network Subsystem
- 2.3 Use Offload Engines, Kernel Bypass, or RDMA for High Speed Data Acquisition
- 2.4 Use an FPGA NIC with TCP/IP Full Acceleration for High Speed Data Acquisition
- 2.5 Use PCIe Peer-to-Peer for High Speed Data Acquisition