High-Speed Data Acquisition Systems
Challenges and design choices to network FPGAs and servers for high-speed data acquisition or retrieval. We discuss TCP/IP as a very fast transport when using TCP/IP full accelerators, in the sensor-side FPGA and in the server.
- High-Speed Data Acquisition Systems
- 1 Challenges in High Speed Data Acquisition
- 2 Design Choices for High Speed Data Acquisition
- 2.1 TCP/IP Full Acceleration for High Speed Data Acquisition
- 2.2 Optimize the Server’s Network Subsystem
- 2.3 Use Offload Engines, Kernel Bypass, or RDMA for High Speed Data Acquisition
- 2.4 Use an FPGA NIC with TCP/IP Full Acceleration for High Speed Data Acquisition
- 2.5 Use PCIe Peer-to-Peer for High Speed Data Acquisition
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